Conventional structures used to build high voltage MOS devices, such as PMOS device 100 shown in FIG. 1, include a P drain extension 110 that extends from the drain edge of the gate 112 to a P+ drain contact 120. The P drain extension 110 is designed so that under reverse drain to body bias, the drain extension 110 totally depletes before breakdown occurs at the drain extension to body junction under the edge of the gate 112. In this design, the P+ drain contact 120 is separated from the high field induced by the gate 112, which is also separated from the drain body junction by a thin gate oxide 130. This makes it possible for the PMOS device 100 to achieve a higher breakdown voltage.
Some applications, however, call for both high voltage NMOS and high voltage PMOS devices on the same structure. One conventional approach has been to make the NMOS using a quasi-vertical diffused metal-oxide semiconductor device (DMOS). A quasi-vertical DMOS device, however, requires a heavy doped buried layer, a sinker, and a thick epitaxial layer with closely controlled resistivity and thickness. These structures increase the complexity and cost of processing.
Another conventional approach has been to build both NMOS and PMOS devices with depletable drain extensions. It is undesirable, however, to use the simple drain extension 110 structure illustrated in FIG. 1 for both device types because this requires both P- and N-type lightly doped islands in which to form the two types of devices. This conventional approach also increases complexity and cost of processing.
Thus, there is need to overcome these and other problems of the prior art associated with high voltage structures that call for both high voltage NMOS and high voltage PMOS devices.